Cirrus Logic Design Verification Engineer Interview Questions | Glassdoor.co.uk

Cirrus Logic Design Verification Engineer Interview Questions

Interviews at Cirrus Logic

7 Interview Reviews

Experience

Experience
83%
0%
17%

Getting an Interview

Getting an Interview
86%
14%

Difficulty

3.1
Average

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Design Verification Engineer Interview

Anonymous Employee in Austin, TX (US)
Accepted Offer
Positive Experience
Average Interview

Application

I applied online. I interviewed at Cirrus Logic (Austin, TX (US)) in August 2019.

Interview

2 Phone screens followed by onsite. I found their interview process to be apt and extracts the best out of the candidate. 1 phone screen is more of behavioral and another one is take home project follwed on explanation and other DSP questions

Interview Questions

Other Interview Reviews for Cirrus Logic

  1. Helpful (1)  

    Verification Design Engineer Interview

    Anonymous Interview Candidate in Raleigh, NC (US)
    No Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 2 weeks. I interviewed at Cirrus Logic (Raleigh, NC (US)) in February 2019.

    Interview

    One 45 minutes phone interview which is mostly the basics of the digital design concepts and OOP concepts followed by one and half hour of on-campus interview. It was a panel interview round.

    Interview Questions

    • Questions related to projects mentioned on the resume, Constraint questions, Write the verilog code and testbench for the given system   Answer Question

  2. Helpful (1)  

    Design Verification Engineer Interview

    Anonymous Interview Candidate in Austin, TX (US)
    No Offer
    Negative Experience
    Average Interview

    Application

    I applied through a staffing agency. The process took 3+ weeks. I interviewed at Cirrus Logic (Austin, TX (US)) in July 2017.

    Interview

    This is not a place that experienced/senior engineers should look to. They seem to have more work than people to do it and are looking to scale through hiring more bodies than changing how they actually do verification reuse. They rely mostly on external recruiters not only for finding candidates but also as agents throughout the whole process so you're mostly dealing with a distant third party headhunter who knows little about the role, industry, or expectations.

    The pre-interview process involved a prescreen call and testbench coding exercise that a candidate does on their own time followed by a technical review call. The onsite interview was not effectively geared towards a Senior person and also involved an on-demand coding activity which was vague and wouldn't reveal much about DV expertise.
    Despite initial positive feedback and follow-up calls, the company took over 2 weeks to respond (via their 3rd party head hunter) with disappointing news and absolutely no other feedback.

    Interview Questions

    • Write a constraint expression for an 8-bit value with the same number of 1/0 bits   1 Answer
  3.  

    Design Verification Engineer Interview

    Anonymous Employee in San Jose, CA (US)
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 4+ weeks. I interviewed at Cirrus Logic (San Jose, CA (US)) in May 2016.

    Interview

    Applied online through company website. Only one round of phone interview. Phone interview lasted for 30 to 45 mins. Questions were mostly based on my resume. Got reply from HR in 10 days.

    Interview Questions


  4. Helpful (2)  

    Design Verification Engineer Interview

    Anonymous Employee
    Accepted Offer
    Positive Experience
    Average Interview

    Application

    I applied online. The process took 2 weeks. I interviewed at Cirrus Logic in March 2016.

    Interview

    Two Technical Rounds were given and a problem was given.
    The question tested basic concepts on Digital Signal processing, object oriented programming oops concepts, C++ coding skills, VLSI fundamentals as well as coding style in terms of intendation and approach towards the problem. After these rounds are cleared you will get to know the result.

    Interview Questions


  5.  

    Design Verification Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Positive Experience
    Difficult Interview

    Application

    I applied online. I interviewed at Cirrus Logic.

    Interview

    I received a phone call from an engineer in cirrus logic. The call lasts for exact 45 minutes. The interviewer asked questions about system verilog, script language, etc. A math problem was also given.

    Interview Questions

    • What is the difference between SV function and Verilog function?   1 Answer

  6. Helpful (3)  

    Design Verification Engineer Interview

    Anonymous Interview Candidate
    No Offer
    Average Interview

    Application

    I applied online. The process took a week. I interviewed at Cirrus Logic in July 2012.

    Interview

    Was schedule a phone interview. The manager of the team took the initial phone interview. He started asking questions on Computer Architecture , super scalar , VLIW and ILP techniques. These questions were totally unexpected since Cirrus doesnt work in these domains. he also did ask questions on basics of Verilog and Digital logic.

    Interview Questions

    • Compare Superscalar and VLIW processors.   1 Answer

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