graduate design engineer interview questions shared by candidates
Difference between blocking and non-blocking assignments and when are they used
Blocking assignment blocks the simulator from executing any other statements. It evaluates the expression on the right of the assignment and updates the left immediately (used in modelling combinational logic) eg. A = B+C Non-blocking assignment evaluates expression on the right of the assignment but does not update the left until the next active edge of the clock. Allows for concurrency since all non-blocking assignments are evaluated concurrently, and update at the next active edge of the clock (used in modelling sequential logic) eg. A <= B+C.
For the interview, it is very useful to know logic operations and how logic gates' I/O can be represented by logic operations. It is also very useful to know how certain expressions in verilog are translated into digital circuitry.