I applied through university. The process took 2 days. I interviewed at Samsung R&D Institute India - Bangalore (New Delhi) in Aug 2015
Interview
There was an aptitude test first which was pretty easy. Half the applicants made it to the next round which was a Tech test related to your major (coding or electronics).
Final round was a GD which lasted 10 minutes at max. The final round was irrelevant though because no matter how you performed at the GD, applicants with higher percentages at university level were picked. So donot apply unless you have great grades. They're not looking for intelligent interns, the want muggers.
Interview questions [1]
Question 1
How can technology change the way we think in future?
I applied through university. I interviewed at Samsung R&D Institute India - Bangalore
Interview
Technical and HR round Technical consist of analog digital and network problems CMos problems ckt problems they are problem solving skill of an individual the interview have a average level and person hiring is very intelligent and smart
I applied through university. The process took 2 days. I interviewed at Samsung R&D Institute India - Bangalore (Trichy) in Aug 2019
Interview
Round 1
Online test contains 40 technical question for 80min of 1,2,3,5 marks.
They included questions related to circuit theory, digital electronics and analog electronics.
Round 2
Then tech interview in which they asked digital electronics questions and about my project.
Round 3
hr interview which contains basic hr questions like tell me about yourself, strengths weakness, why samsung, where you see yourself in next 5 years.
Basic digital questions on latch flipflop, how to get Edge triggering, data bit and address length of memory, implementing32*64 memory using 32*32, sequence detector and on project verilog and fpga.
Interview questions [1]
Question 1
Basic digital questions on latch flipflop, how to get Edge triggering, data bit and address length of memory, implementing32*64 memory using 32*32, sequence detector and on project verilog and fpga