first round with various FPGA coding tasks (verilog or vhdl), on understanding logic, resource usage, cycle delay, async vs sync logic, etc. counters, registers, mux, demux, adder, multiplier, etc. HDL language (verilog or vhdl) features to a detail
There was a hacker rank interview in the first round. The hacker rank interview took about 2 hours. I think there were about 30 questions. They were low level FPGA questions.
I applied online and got invited for the online assessment. OA was a 60 minutes exams with multiple choise questions and RTL code debuging, and mostly basic digital logic questions. still waiting for the result.
I applied online. I interviewed at Optiver (Amsterdam) in Jan 2026
Interview
I just did the first assessment and it was about multiple choice questions and a coding question in c and a debug questionin verilog. Most of the multiple choice questions were about logical gates and truth tables
