Phone call Interview: Physical Design Flow. What problems did you face ? How to remove Setup violation ? How to remove Hold violation ? Unix commands: ls, cp, grep what is the command to check processes running ? How to run process in background ? softlink command how to check disk usage ? Perl questions: chop vs chomp array, hash, default scalar sign. what is th difference between array and hash when we do indexing ? Logic: he gave me one boolean exp to solve. latch vs flop sram vs dram ? which one is volatile? D FF using MUX D FF operation Comp Arch: pipeline ? cache ? virtual memory ? TLB ? what is the set size for fully associative cache ? Direct associative ? he had given me configuration. Verilog: blocking vs nonblocking initial block ? always ? FSM for 0101. moore vs mealy ?(mealy is prone to glitches. This is what he wanted to hear) verilog code for DFF. Physical: electromigration. setup. hold time, skew ? effect of length, width, thickness on resistance. effect of temp, voltage on Delay. Onsite: First round: she was also Trojan :-) (USC Fight On) tell me about urself. why this transition ? (undergrad in Elec&tele, job in software and MS in EE) Physical Design flow ? what to do to remove setup violation? Hold violation ? sizing, MOS structure, VI curve, effect of voltage on delay, temp on delay ? problem on setup and hold using delay values. power minimization techniques. She was going in depth. Thats it. Second round: Unix commands: how to find .txt files, copy files from one directory to another. find files with particular string. how to execute unix commands in perl script ? (ANS: use exec before each unix command and done) use strict ? what is tht #! usr/bin/perl we write at the start of program ? C vs perl ? Read the file(set up vioations). there are 1000 lines in that file. Print 5 worst delays. array vs linked list with respect to memory allocation. pipeline ? stages ? which CPU is better ? 1GHz vs 2 GHz. Third round: Physical design flow. behavioral: situation when you had conflict with your friend. how you handled situation. how you divide work while working in group. how will you avoid conflict ? (Divide work) how you do finish work before deadline? when you start working on something, you get some problems, you solve it then how do you avoid same mistake in future.(I will note it down. he wanted to hear this) skew, seup time, hold time. Fourth round: Physical Design Flow, synthesis steps, APR steps, problems related to setup and skew.

FIFO explanation and verilog code for it