Hardware engineer interview questions shared by candidates
Fourth onsite interview: - Explain me the metastability - How can you cross different clock domains - Explain me how a FIFO does work and how is it built Fifth onsite interview: - Reasoning questions. Too much complicated to explain by text, sorry guys!
Fifth onsite interview: - Reasoning questions. Too much complicated to explain by text, sorry guys!
First onsite interview: - Showed me a Stratix Altera FPGA ALM and asked what is it, which manufacturer and which model - Same but with a Xilinx one - Asked me to explain a document regarding some state machine explanation by Altera - Showed me an Altera transceiver schematic and asked me to explain it and detail each block of it - Showed me a general schematic of an FPGA and asked me to define each hard block that was present on it - Showed me a diagram of CVP (Configuration via Protocol) from Altera and asked to explain it
Third onsite interview: - You have a black box that takes two numbers in two different inputs and gives you the biggest and the lowest number on two different outputs. Use this black box to build the same but with 4 numbers input - You have a synchronous that receive on each block pulse a new bit that you add the serie of bits received on each clock pulse. Due to this add of bit, build a system that is able to say if, on each clock pulse, the new number is divisible by 5 or not
First phone interview: - What is the difference between the cache memory and the global memory? - What does an FPGA cell contain? - What kind of hard blocks can you find in an FPGA? - What does a DSP core contain? - What will be the maximum size of a multiplexer if I have a 6 inputs lookup table? - How many lookup tables do I need to build a 64 inputs multiplexer? - What is a linking list? - What is the polymorphism? - What do you know about threads? - On linux, which command do you have to write to copy a full folder containing other folders and files? - You need to write a compiler, which language would you use?